1. Field of the Invention
The present invention relates to a circuit arrangement for driving a power transistor in high efficiency.
2. Description of the Prior Art
FIG. 13 shows a conventional transistor drive circuit disclosed in Japanese Laid-open Patent Publication No. 57-151278. The circuit arrangement shown includes a turn-on pulse transformer T11 and a turn-off pulse transformer T12. A transformer driving transistor Q11 has its collector connected to one end of a primary winding of the turn-on transformer T11, while the other end thereof is connected to a d.c. power source Vcc for supplying power to the pulse transformers. A secondary winding of the transformer T11 has one end connected to the anode of a diode D11 which has its cathode line branching into two paths. One of the paths includes a filter circuit made up of a charging current limiting resistor R11 and a capacitor C, and a diode D12, and the other path includes a diode D13 which is connected to bypass the former path. The node of both paths opposite to the diode D11 is connected through a base current limiting resistor R12 to the base of a main transistor Q13 which constitutes part of a main circuit. The other end of the secondary winding of the turn-on pulse transformer T11 is connected directly to the emitter of the main transistor Q13.
In the circuit section for processing the turn-off signal, the turn-off pulse transformer T12 driven by a transistor Q12 is connected at its one end of the secondary winding to the emitter of the main transistor Q13 through a branch current suppressing diode D14 (which also serves to rectify the turn-off signal), and connected at another end of the secondary winding to the base of the main transistor Q13 through a reverse bias current limiting resistor R13. Further connected between the base and emitter of the main transistor Q13 is a parallel connection of a diode D15 and a bypass resistor R14.
The operation of the above circuit arrangement is as follows. Supposing the issuance of a turn-on command signal shown in FIG. 14(a) applied to a pulse generator (not shown) so that it generates a train of high-frequency pulse signals A applied to the base of the transistor Q11, and the transistor Q11 becomes conductive in response to a rise of the signal A to energize the turn-on pulse transformer T11. The transformer T11 produces a turn-on signal on its secondary winding, which is rectified by the diode D11 and supplied as a sharp-rising base current IB1 shown in FIG. 14(e) to the base of the main transistor Q13 via the diode D13 and current limiting resistor R12, causing the main transistor Q13 to become conductive. During the above operation, the capacitor C is charged through the charging current limiting resistor R11.
Subsequently, when the pulse signal A goes low, causing the transistor Q11 to cut off, the diodes D11 and D13 also become nonconductive, but the charge in the capacitor C retains the diode D12 conductive and the discharge current from the capacitor C flows through the diode D12 and base current limiting resistor R12 to the base of the main transistor Q13. Consequently, the main transistor Q13 stays conductive. As a result of discharging, the voltage across the capacitor C falls as shown in FIG. 14(d). By the iteration of these operations, the capacitor voltage VC and the base current IB1 have ripple components as shown in FIG. 14(d) and (e), and the main transistor Q13 is held in the on-state by the base current IB1.
The cut-off operation for the main transistor Q13 is implemented by the removal of the turn-on command so as to cease the pulse signals A and, at the same time, by supplying a turn-off pulse signal B shown in FIG. 14(c) to the base of the transistor Q12 driving the turn-off transformer T12. The turn-off signal produced on the secondary winding of the pulse transformer T12 in response to the signal B is rectified by the diode D14, which also serve for branch current suppression, and applied to the emitter of the main transistor Q13, causing a sharp reverse bias current IB2 shown in FIG. 14(e) to flow from the emitter to the base, and the main transistor Q13 is cut off. In this case, the reverse bias current limiting resistor R13 is preferably chosen to have resistance sufficiently smaller than the resistance of the base current limiting resistor R12, so that the main transistor Q13 operates in a minimal cut-off time. Remaining charge in the capacitor C is discharged as a discharge current IC, and the voltage VC across the capacitor C is clipped as shown in FIG. 14(d).
The conventional transistor drive circuit as set forth above necessitates a base current limiting resistor, as can be seen from the above description, and a variation in V.sub.BE of the main transistor due to its collector current and a variation in the supply voltage can cause the variation in the base current. In addition, the resistance current limitation results in an increased power loss and therefore heat generation. The reverse bias circuit enters the nonconductive state by being reversely biased solely at the moment of turn-off, and the circuit is apt to malfunction in the presence of noises and needs two pulse transformers having the withstand voltage against the main circuit.